Source-Drain (S/D) doping in scaled Si channel based bulk FinFET devices can be built by embedding highly in-situ doped epilayers into recessed S/D areas of a transistor. The in-situ doped epilayers, according to their structure and material, are able to efficiently introduce strain into the Si channel and dopants into the S/D junctions. The combination of the introduced strain and the dopants can provide increased channel mobility, improved short channel behavior and reduced parasitic S/D resistance.
The introduction of strain by in-situ doped epilayers may not obtain such mobility benefit in SiGe channel based FinFETs. For example, a SiGe channel has inherent strain even without any S/D epitaxy. Recessing Source-Drain may result in partial elastic SiGe strain relaxation in the channel region. However, SiGe FinFET devices can still require sufficiently high and conformal junction doping levels over the entire height of the SiGe channel.